DESCRIPTION

XtremeData's XD1000™ development system is a complete platform on which to explore the benefits of FPGA coprocessing within an x86 COTS computing environment. The development system ships with a full complement of hardware, software, and FPGA IP so that users can immediately begin developing their FPGA-accelerated applications.

The hardware includes a Linux®-based PC tower and monitor. Inside the tower is a dual Opteron® motherboard populated with one AMD Opteron processor and one XD1000 FPGA Coprocessor Module. The XD1000, installed in the second Opteron processor socket, uses the motherboard's existing CPU infrastructure to create a full-featured environment for FPGA coprocessor functions. The high-bandwidth, low-latency HyperTransport™ link between the XD1000 and the Opteron enables tightly-coupled FPGA acceleration of x86 applications previously impossible with legacy PCI-bus based solutions. The XD1000's JTAG and I2C ports are cabled to the back panel PCI brackets for easy access, and allow for Altera's SignalTap® software to provide waveform viewing of signals in the FPGA fabric. A clear side panel on the PC tower permits direct viewing of XD1000 LEDs.

The development system supports a number of FPGA configuration options. The FPGA can be configured directly via the supplied USB Blaster cable. Up to four FPGA configurations can be stored in XD1000 on-board flash memory. After system power-up the FPGA is automatically loaded with the configuration file resident in the default flash location. Application software running on the Opteron can also store FPGA configuration images in XD1000 flash memory and initiate an FPGA reconfiguration from any of the four locations.

The development system ships with a full suite of Altera's industry leading FPGA development tools, including Quartus® II, SOPC Builder, the Nios® II Embedded Design Suite, and the recently released C-to-Hardware Acceleration Compiler. A reference design including all of the necessary XD1000 interface IP is also provided to jump-start development efforts.

XtremeData provides an open source Linux device driver which allows user space applications to access memory mapped FPGA resources directly, to service FPGA interrupt requests, to lock physical memory, and to perform FPGA controlled DMAs.
 

 XD1000 Development System Product Flyer (444.14 kB)
 

HARDWARE INCLUDED

XD1000™

• Altera's largest FPGA, EP2S180
• All 3 HyperTransport™ links available
• DRAM interface, 128 bits wide, 333 MHz
• 4 MB ZBT SRAM, 32 bits wide, 200 MHz
• 32 MB FLASH, four uncompressed FPGA images
• I2C voltage and temperature monitoring

Dual Opteron™ PC

• Opteron™ Host CPU, 248 2.2 GHz
• Eight 1 GB DDR400 SDRAM modules
• Chassis wired for external access to FPGA via PCI brackets
• Monitor
• Keyboard
• Mouse

Accessories

• Altera's USB Blaster download cable
• Total Phase Aardvark I2C cable and monitoring software

SOFTWARE INCLUDED

Altera® Tool Suite (1 year license)

• Quartus® II 6.0, Windows®-based
• Mega-Wizard IP
• Altera's version of ModelSim®
• Nios® II Embedded Design Suite with C2H (C to Hardware) Compiler,
  1 year prototyping trial license
• SOPC Builder — System On a Programmable Chip
• SignalTap® — remote waveform viewer for FPGA internal signals

Reference Design (VHDL, 1 year upgrades)

• HyperTransport™ Interface
• DRAM Interface, Altera Mega-Wizard
• ZBT SRAM interface
• DMA controller
• Simulation models for all board components
• Code demonstrating basic functionality
• Linux device driver

Linux® OS

• Fedora™ Core 6